Keyboard shortcuts

Press ← or → to navigate between chapters

Press S or / to search in the book

Press ? to show this help

Press Esc to hide this help

ROM table

The ROM table is the root component used to discover all remaining debug blocks in an RTLDebug system.

The ROM table's base address must be discoverable somehow so that debug software knows how to find it. Due to the variation in possible bridge and bus designs, we are not specifying the discovery mechanism in this document; the specification for each bridge interface must provide a discovery mechanism.

A ROM table can be at most 1 kB (256 words) in size. This means the maximum allowed size of a ROM is 127 descriptors plus the header. If more than 127 debug cores are needed in the SoC, multiple ROM tables can be chained in a linked list, with a "ROM_" entry from one table pointing to the next.

Addressing

Implementations MAY combine the ROM table with other ROMs, such as boot code or ILA probe manifests. The ROM table MUST be aligned on a 32-bit word boundary, but does not require a larger alignment (i.e. it can be placed at an arbitrary word offset within a larger shared ROM).

A ROM table consists of a 2-word header at offset 0x00, followed by zero or more descriptors starting at offset 0x08.

COUNT

** num_desc **: number of descriptors in this ROM table, not including the header.

Zero is a legal no-op value and causes this ROM table to be ignored.

PADDING

RFU / RAZ: Padding to allow descriptors to be aligned on 8-byte boundaries.

Reserved for future use; implementations MUST return 0x00000000 and debuggers MUST ignore this value until another function is defined.

Descriptor

FOURCC

Four-character code (FOURCC) uniquely identifying the debug block.

FOURCCs are packed into 32-bit registers with the leftmost character in the most-significant byte position, i.e. "ROM_" is encoded as the 32-bit value 0x5f4d4f52. If you are on a little-endian host system this will give correct byte ordering when casting a uint32 register to a char[4]. Big-endian systems will require a byte order swap.

POINTER

base_addr: 32-bit pointer to the base address of the debug block

FOURCC list

All entries other than those listed here are reserved for future use. All FOURCC's currently defined (other than padding) must consist only of printable ASCII characters as of this version of the specification, however this restriction MAY be relaxed in the future.

  • 0x00000000 A FOURCC consisting of four nul characters (not to be confused with the digit zero) is used for padding at the end of a ROM table. A null FOURCC MUST be paired with a null pointer (i.e. a descriptor consiting of eight zero bytes). Implementations MAY choose to stop reading the ROM after encountering a null FOURCC; all ROM table entries after a null descriptor MUST also be null descriptors.

  • !xxx All FOURCC's starting with a '!' character are reserved for implementation defined or testing purposes.

  • GPIO 32-bit bidirectional GPIO controller

  • ILA_ Internal logic analyzer (link TODO)

  • ROM_ Pointer to a second ROM table, as specified on this page. ROM tables can be chained in an arbitrarily long linked list if more than 127 debug cores are required in the SoC.

  • VIO_ Virtual IO (link TODO)